Chip Chat Podcast - Introducing the Compute Geek's Version of the Muscle Car

I?ve spent a lot of time talking about efficiency lately?but there?s nothing more fun than talking about pure performance.  Performance is the hum of a well tuned engine as you downshift around a mountain curve, the wind in your face as you race down a hill on your bike, the thrill of a jet plane?s roar as it streaks across the sky.  It?s also the smoking speed of a workstation when you?re used to a standard desktop PC?and that speed just got a lot faster with the introduction of our Xeon 5500 series workstation platforms.  I recently talked to Thor Sewell and Wes Shimanek from our technical computing organization about what is shaping workstations and digital workbenches today, the key technologies driving workstation performance, and what users can expect from the compute geek?s version of the muscle car.  Check out what they had to say here.

Invoking parallel tasks

In a recent post, Robert Chesebrough (Intel) talked about less focus on threads and more focus on tasks. I agree with him. I do believe that decomposing the job to be done into many tasks is the key to a successfully parallelized algorithm.

Once you have the most important tasks, you can re-design the algorithm taking into account that you must exploit parallel architectures. Of course, you must understand how threads work and how modern multi-core microprocessors work. Then, you can use tools like a Gantt chart (yes, a Gantt chart) to find the critical sections (those areas where parallelization is extremely difficult or nearly impossible).

This time, I?m going to show a simple example taking into one of the new features offered by future .Net 4.0 Parallel Extension. If you have an application that must perform many tasks and you discover that you have more than 2 cores available, it would be very convenient to launch them in parallel.

However, which is the simplest way to launch many completely independent tasks in parallel? In C# 4.0, you?ll be able to use the new Parallel.Invoke method combined with lambda expressions:

Parallel.Invoke(
() => ConvertMeshes(myMeshes),
() => ConvertMaterials(myMaterials),
() => ConvertLights(myLights)
() => ConvertCameras(myCameras)
);

Taking into account the default options (you can even change many options taking into account your needs), if you run this code in a quad-core CPU with four logical cores, this is what will happen:

ConvertMeshes(myMeshes) will run in Core #0.
ConvertMaterials(myMaterials) will run in Core #1.
ConvertLights(myLights) will run in Core #2.
ConvertCameras(myCameras) will run in Core #3.

The current thread will be blocked until the four methods return from their execution in parallel. However, you could also run these four tasks concurrently and asynchronously. I?m trying to keep things simple.

Is the code above easy to understand? Yes, it is very easy to understand it. It is easy to maintain. It is easy to optimize it.

If you want to take full advantage of the future Parallel Extensions in .Net 4.0, it is highly recommended to learn about lambda expressions. They were introduced in C# 3.0 to shorten the code and to make it more functional.
Combining lambda expressions with the new task oriented approach that is going to be introduced in Parallel Extensions in .Net 4.0, exploiting multi-core microprocessors will be indeed easier for most C# developers.

The aforementioned example is very simple. I tried to keep things simple, this was my idea in this post.

However, please, do not forget to learn about threads. You?ll need that knowledge in the new parallel age.

The Less talked about feature in New Xeons.

The Internet is abuzz on newly launched Intel Xeon processors, there are reviews showing manifold increase in server performance, which is for some type of applications the number is 150%. We have seen multiple records being shattered. Xeon 55XX series is doing the exact thing in the server world, what Core2duo did to the desktop space back in 2006. The beauty of new Xeon is that, its brings in something for everybody, Database applications, web servers, business logic servers, IT infrastructure applications, virtualization, HPC etc etc. While the IT administrators are busy reading reviews and calculating how much money they can save replacing thier aging infrastructure, I did like to give a small information about a less talked feature in the new Xeon called PCU.

While the new Xeon got a brand new architecture, much discussed features are Integrated Memory Controller, Quick Path Interconnect, Turbo Mode (Any body remember the Turbo Switch on your computer cases back in old days, Turbo Mode gets you the Turbo speed without the need of the switch). But there is onething our architects added to Xeon architecture which is quite interesting but not talked much about is the Power Control Unit or PCU, I am going to provide a simple understanding of this feature without delving into complicated terminology of gates, Phase Locked Loops etc.While desktop users wont tend to bother much about power usage, things work differently in the server world. Data center architects and managers spend hundreds of hours crunching numbers on how to make their Data centers run cool without paying heft electricity bills. So having a power efficient processor under the hood of the server which can efficiently manage its power consumption means, saving money on power bills not only with actual power saving on the server but also the related cooling cost of the data center. Now that you know why it is a big deal to have a intelligent Microprocessor, lets see what is this thing PCU.PCU is an on-die micro controller introduced and dedicated to manage power consumption of the processor, this unit comes with it's own firmware andgathers data from temperature sensors, monitors current, voltage and takes inputs from operating systems and not to forget that it takes almost a Million transistors to put this this micro controller on-die, while a million sound like a drop in an ocean in a billion transistor processor, considering the older Intel 486 processor had the similar transistor count and ran windows 3.x quite well.In simple words the PCU controls voltage applied to the individual cores by using sophisticated algorithms, and hence sending the idle core to almost shut off level and reducing the power consumption. But let me explain this in more elaborated manner. In an older generation CPUs it wasn't possible to run each core on different voltages since they shared the same source and the idle cores still leaked power. But with the new generation Xeon, even though the four cores gets voltageWe can always say why there is a need for on-die power management when the same can be achieved by any operating system using ACPI power states, PCU accepts power state requests from operating systems but uses its own built in logic to doubly ensure that the OS request holds merit. There are instances where the operating system instructs the CPU to go to lower power state only to wake it up next moment, adding PCU get this process a fine grained efficiency and helps our customer data center run much cooler.

World Record Performance w/Intel XEON Processor 5500 Series

The Intel XEON Processor 5500 is the new world record holder in >30 top performance benchmarks for 2-socket servers. Check out this video with Pat Gelsinger at the launch event in Santa Clara.

You can also check out all the performance results here: Server Performance Summary - Intel

Teach Parallel! Dan Garcia - Passion, Beauty, Joy, Awe and Computer Science

Professor Dan Garcia, Lecturer, UC Berkeley

All Sorts of Sorts

Hi all,

As some of you may already know I am getting married May 11'th. Yes, yes, a very happy occasion. Doesn't leave time for anything... Well, there is enough for a blog post but not enough for writing code and doing some QA.
I actually started with the Radix-Sort Challenge (Threading-Challenge-2009) but couldn't find the time to have it completed, not even talking about tested? So I thought that I might as well share my thoughts about this problem. Philosophically that is, nothing tested, no responsibility, so I can allow myself to wonder off and talk about things that may not even work ;-)

Going over Wikipedia (as briefly as possible) I learned that Radix sort is a type of sort that deals with constant size data types. Sorting algorithms deal massively with data comparisons. Since the input for this challenge was defined as 7 ASCII characters for each data item, it is very simple to convert it to a 64 bit integer. As a collection of 64 bit integers the CPU can compare two items in a single instruction and all new compilers have support for that. So basically the task is to sort a list of integers.
I was asking myself how many cores I should use and whether or not I should use the build in CPU acceleration such as MMX. The simple answer I found was that if the collection of numbers can fit in the fast cache then I should start doing some math? However the problem here deals with somewhere up to 2^31 items, or up to 2G of items. This is way over the size of any cache so the work is done by the CPU directly with memory.
The memory is always slower than the CPU and the operation to perform takes a single CPU instruction. This means that the bottle neck should be the memory and therefore the strategy should start by reducing memory transactions to the minimum.

The simplest and fastest solution I could think of for sorting numbers was to merge sorted lists. For example when we want to sort a list of 8 items we first sort the data as two lists of 4 items and then join the two lists. This manner requires only a single passage over every item in the list for every merge. For example a list of 1,6,3,7,9,2,5,4 is split and sorted into 1,3,6,7 and 2,4,5,9. The sort algorithm only goes forward in the list and has only a single comparison to make. Working in merges it takes 31 passes over every data item to complete 2G of items.
The problem is that reading an item and copying it to an output list handles 2K of memory for every 1K of data to sort. The goal is to reduce memory transaction to the minimum. The solution is to swap the items in the merged lists, so for two merging lists of A1,A2,A3,A4 and B1,B2,B3,B4 the output should be a multi-dimensional array of: A1,B1,A2,B2,A3,B3,A4,B4. The next merge will result in A1,B1,C1,D1,A2,B2,C2? and so on. This will keep memory transactions to the minimum amount and also ensure that the memory is still in CPU cache for as long as possible.

Eventually the merges should be on lists that are too long for the cache to hold them, for example a merge between two lists of 100MB. The only thing we can do to utilize the cache is to keep merging on the same list for as long as possible, instead of methodically merging all the 1KB lists in the system from start to end. Another optimization that might help just a bit is merging forwards and backwards alternatively instead of going forwards all the time. When a forward merge is complete the end of the list is in cache so it is more efficient to start merging from that point downward to the beginning of the list. At the end of a reverse order merge the cache holds the beginning of the list and it is most efficient to merge forwards.

This is what I was going to try and test. Single threaded. That is of course if I had the time? but as you already know, I barely have the time to write about it in a blog post.

Good luck to everyone who did.

If you are reading this and you feel that my guesses are all bad ? feel free to say it out loud. You can also reflect about it out loud, or just congratulate me for my eminent wedding? anything goes :-)

Best,
Asaf

Viliv MID taking Pre Orders Today!

Ya'll know me by now. I usually don't spout out marketing messages on this blog but consider this one exception. I had the Viliv MID (review below) over the weekend and I fell in love with it; mainly because I was able to download and use Tweetdeck, something that failed to work on previous devices.

So here is the marketing message. Starting today (April 27th @ 1:00 PM EST), Dynamism is accepting pre-orders for $599, with the first orders expected to ship on May 8th. And, as an added incentive, those who pre-order will also get a spare battery, a car kit, and a leather pouch, which Dynamism says is a $135 value.

All excuses aside, I was in a little rush recording this video; mainly because I have to return the Viliv in the morning. So if there is a mistake, please forgive me and I assure you that I will apologize tomorrow. Hopefully, I can get my hands on it again soon in the future and record a more comprehensive video. Enjoy.

Video Testimonials from IT Managers on Symantec Altiris Client Management Suite with Intel vPro Technology

While at Symantec ManageFusion 2009, we had a chance to talk to IT executives and managers from Las Vegas Sands Corporation, Blue Cross Blue Shield and McCormick Spice Company and Lee Bender, senior technical manager from Symantec. In this video, they talk about benefits of Symantec Altiris Client Management Suite v6.5 (and above) with Intel vPro Technology, including power management, remote diagnosis and repair, and fast call for help.

To learn more about Intel's presence at Symantec ManageFusion 2009, go to: http://www.intel.com/go/managefusion/

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vSphere 4 and Intel Xeon 5500: Where ROI meets innovation...

In 1934, the legendary investment educators of Ben Graham and David Dodd, published the seminal stock investment book of the 20th century. "Security Analysis" provides a clear framework for value investing, unlocking capital value of a company and creating a "margin of safety" in the investments. In many respects, these principles became the backbone of Warren Buffett's investment criteria and the backbone of the great wealth that his companies have created for their shareholders and employees alike.

...But what does that have to do with Virtualization and Cloud Computing and VMWare's vSphere launch this week? Everything!As global economic conditions careen on a daily basis it has become incumbent of IT professionals, technologists and designers to constantly re-evaluate our product development, deployment and usage models we enable. VMWare's launch of vSphere, in my opinion, is a leading indicator of this transition. After years of technology collaboration and design with Intel, vSphere introduces new usage models for Disaster Recovery, Zero-Downtime maintenance and flexibility that have yet to be realized in the x86 environment. The Distributed Resource Scheduler continues to enable additional features for virtual machine mobility, management and power optimizations. Many customers I speak to regard the rapid application deployment capability of virtualization as a differentiating factor for deploying virtualization widely. vSphere 4 enhances this capability while adding additional storage, high availability and 10 gigabit ethernet support for the new Intel platforms being introduced.All of the features were designed to increase performance and efficiency. To create value that is worth more deployed than it costs to maintain your current assets. vSphere combined with the new Intel Xeon 5500 series processor family quite honestly, out performs all expectations than we had originally forecasted. We suspected that the architectural enhancements, combined with the virtualization technology collaboration would allow for 80-100% performance improvement over the previous generations. We suspected that the page table optmizations, quickpath interconnect and hyperthreading would be the key drivers...we were right. However, the new product launch has already delivered 160% plus performance increases over previous generations of VMWare when combined with Intel Xeon 5500 series processor family from Dell, HP, Cisco and IBM...exceeding our expectations by 60%. The performance results are very similar to the disciples of "Security Analysis", ahead of expectations and ahead of all others in the marketplace.Next week I will be delivering an online webcast, one of the many I do each year to discuss this further and I will also spend some time discussing Cloud computing direction (link is below). vSphere is being marketed as the industry 1st operating system for Cloud Computing and on this point I would have to disagree. vSphere is a foundational technology that will help to enable enterprise cloud deployments, Paul Maritz and team have a solid vision for Cloud but vSphere falls short of being a Cloud Operating system for several reasons. It does not support a clear integration to mobile clients and mobile data. vSphere does not have desktop operating system integration and image management capabilities for IT administrators. Does that mean that I wouldn't vSphere in a Cloud? No, it just means that I would not look to vSphere as the sole technology for Cloud operating environments. For managing my server, storage and networking deployments in the Enterprise Cloud this product delivers as advertised. Cloud computing is in it's infancy, Vmware and Intel are playing important roles in bringing important technologies to market which will become the foundational technologies for Cloud computing. Like Ben Graham and David Dodd, it will be critical to evaluate your investment criteria for success, find the tools that create the best value and make the consistent investment that has a "margin of safety" you and your organization can sustain. If you follow those key steps when evaluating your decision with vSphere and Intel Xeon 5500 series processor family you will continue to create incremental value in your virtualization deployments without incremental expense.Jake Smith Virtualization Webcast:http://www.brighttalk.com/webcasts/3761/attend - April 29th, 2009 WebcastIntel Xeon 5500 Series Processor Virtualization Performance Results:http://www.vmware.com/products/vmmark/results.html